Enhancing AI-Inspired Analog Circuit Design: Optimizing Component Sizes with the Firefly Algorithm and Binary Firefly Algorithm
DOI:
https://doi.org/10.4108/eetinis.v12i2.7859Keywords:
Firefly Algorithm, Binary Firefly Algorithm, simulation-based optimization method, two-stage op-ampAbstract
This paper explores the use of the Firefly Algorithm (FA) and its binary variant (BFA) in optimizing analog circuit component sizing, specifically as a case study for a two-stage operational amplifier (op-amp) designed with a 65nm CMOS process. Recognizing the limitations of traditional optimization approaches in handling complex analog design requirements, this study implements both FA and BFA to enhance convergence speed and accuracy within multi-dimensional search spaces. The Python-Spectre framework in this paper
facilitates automatic, iterative simulation and data collection, driving the optimization process. Through extensive benchmarking, the BFA outperformed traditional FA, balancing exploration and exploitation while achieving superior design outcomes across key parameters such as voltage gain, phase margin, and unity-gain bandwidth. Comparative analysis with existing optimization methods, including Particle Swarm Optimization (PSO) and Genetic Algorithm (GA), underscores the efficiency and accuracy of BFA in optimizing circuit metrics, particularly in power-constrained environments. This study demonstrates the potential of swarm intelligence in advancing automatic analog design and establishes a foundation for future enhancements in analog circuit automation.
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